A bus is a communication system that transfers data between components connected.
Star Bus
All devices connect directly to a central hub/switch
Ring bus
Devices connected in a loop. Each device
forwards data to the next
-: High latency, fault-sensitive
+: predictable latency
Crossbar bus
Every device has a dedicated path to every other (via a matrix of switches)
+: Maximum throughput
-: Expensive, large area in hardware
Tree (Hierarchical) bus
Devices are connected in a layered tree
structure
+: Structured scalable:
-: Upper levels are bottlenecks(Hard to communicate with same level node )
Typical Bus Types
system buses
Connect processor to other components
General communication backbone inside the computer
Memory buses
Dedicated to connecting processor to memory
I/O buses
Connect processor to I/O devices
BUS
A communication system consisting of
• a set of wires to which multiple components
connected, and
• a control design to control data transferred between
the connected components.
Only one component can transfer data on the
shared bus at any given time
Arbiter
Controls access to the shared bus
• Uses an arbitration scheme to grant a master the
access to bus
Random scheme
A master is randomly selected among other masters who are currently requesting access to bus.
- simple to implement
- statically fair
- Inefficient
Round Robin
Each master is granted access to the bus for a fixed amount of time in a cyclical order
- Simple to implementent
Static priority
The grant signal is chained through masters.
The master that is closer to the arbiter has a
higher priority.
Dynamic priority
The priority of a master is dynamically changed
during application execution
- High bus utilization and efficiency
- High implementation cost
- Requiring additional logic to analyze traffic at run time to adapt to dynamic traffic
- Requiring registers to track priorities and traffic profile
Programmable priority
Simpler variant of dynamic priority scheme
Programmable registers in arbiter allow software to change priority
Decoding
determines the target for any transfer initiated by a
master
Both Arbiter and Decoder can be centralize or distributed.
Bus clocking
Asynchronous bus
- No clock
- Requiring a handshaking protocol